Analog Implementation of Fractional-Order Elements and Their Applications

With advancements in the theory of fractional calculus and also with widespread engineering application of fractional-order systems, analog implementation of fractional-order integrators and differentiators have received considerable attention. This is due to the fact that this powerful mathematical tool allows us to describe and model a real-world phenomenon more accurately than via classical “integer” methods. Moreover, their additional degree of freedom allows researchers to design accurate and more robust systems that would be impractical or impossible to implement with conventional capacitors. Throughout this thesis, a wide range of problems associated with analog circuit design of fractional-order systems are covered: passive component optimization of resistive-capacitive and resistive-inductive type fractional-order elements, realization of active fractional-order capacitors (FOCs), analog implementation of fractional-order integrators, robust fractional-order proportional-integral control design, investigation of different materials for FOC fabrication having ultra-wide frequency band, low phase error, possible low- and high-frequency realization of fractional-order oscillators in analog domain, mathematical and experimental study of solid-state FOCs in series-, parallel- and interconnected circuit networks. Consequently, the proposed approaches in this thesis are important considerations in beyond the future studies of fractional dynamic systems

Reliable High-Frequency Fabricated Fractional-Order Capacitors and Their Passive Circuit Models

The impedance characteristics of three different type of fractional-order capacitors (FOCs) with an order of -0.74, -0.79, and -0.91 are analyzed. The used devices have excellent feature such as constant phase angle in the frequency range 10 MHz - 100 MHz. Their impedance data is fitted with second-order passive electrical model structures of Foster-I abd Foster-II using standard EIA-48 compliant component values phase error. The effect on phase and pseudo-capacitance using a detailed experimental study of series-, parallel-, and inter-connected FOCs is also shown

A Novel Pseudo-Differential Integer/Fractional-Order Voltage-Mode All-Pass Filter

The paper presents the first- (integer) and fractional-order case studies of a novel pseudo-differential (P-D) voltage-mode all-pass filter (APF) employing a single differential voltage current conveyor (DVCC), one resistor, and a single grounded capacitor. The proposed filter brings significant reduction of complexity in comparison to available fully-differential or P-D filter topologies. Moreover, it was also shown that fractional-order capacitor can be used for gain response compensation of the proposed APF. The theoretical results of 0.8th and 1st-order APF were verified by Cadence IC6 Spectre simulations using new structure of DVCC via TSMC 0.18 µm CMOS process parameters supplied with ±0.9 V voltages

Voltage Gain-Controlled Third-Generation Current Conveyor and its All-Pass Filter Verification

The paper presents a new active building block (ABB) called minus-type voltage gain-controlled third-generation current conveyor (VGC-CCIII) in which the voltage gain between Y to X terminal can be controlled. The usefulness of the tunable feature in the presented ABB is demonstrated in current-mode {0.3rd; 0.5th; 0.7th; 1st}-order all-pass filter (APF) employing single VGC-CCIII, one capacitor, and one resistor. The theoretical results of the integer- and fractional-order APF are verified by SPICE simulations based on readily available IC OPA860 macromodel, which can also be used in experiments

Practical Design of Fractional-Order Oscillator Employing Simple Resonator and Negative Resistor

This contribution presents straightforward design of a fractional-order oscillator employing novel simple impedance inverter (implementing differential voltage current conveyor transconductance amplifier as active element) used for construction of parallel LC resonator and requiring also negative resistor. Design supposing two output waveforms with constant amplitude ratio and phase shift 155 degrees (–25 degrees) supposes two identical constant phase elements (fractional-order capacitors). The key advantages of our solution, stability of ratio of output levels and phase shift between generated waveforms, were confirmed by simulations